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Intel Senior Fellow, Intel Foundry Technology Development, Director, Intel Europe Research and Development

The Reliability, Failure Physics and Analysis Aspects of Semiconductor and Packaging Research for 2030+


Dr. Robert Chau is the Director of Intel Europe R&D and a Senior Fellow in the Intel Foundry Technology Development group at Intel Corporation. A 36-years Intel veteran, Chau is responsible for establishing Intel’s semiconductor and packaging R&D infrastructures across Europe and expanding its partnership with the European R&D ecosystem including RTOs, universities, and local industries to develop enabling innovations for Moore’s Law and Beyond. Prior to relocating from the U.S. to Europe in June 2022 to take on the current role, Chau was the general manager of Intel Components Research for 9 years responsible for driving Intel’s internal process technology research for enabling its next and future technology nodes. Chau holds more than 480 issued U.S. patents on semiconductor device and process technologies and was the recipient of the 2015 Intel Inventor of the Year Award. He received numerous semiconductor industry awards including the 2012 IEEE Jun-ichi Nishizawa Medal and several SEMI Awards for North America for his transistor inventions and their implementation in high volume manufacturing. Chau is an IEEE Fellow and an elected member of the U.S. National Academy of Engineering.



ESD Team Manager and Director of Advanced Technology Development University Research Program, Advanced Technology Development, Texas Instruments, Dallas, Texas, USA

System-Level ESD Design in HV Automotive Applications: Process, IP and System
Co-Design Challenges


Gianluca Boselli completed his master in EE at the University of Parma, Italy, in 1996. In 2001, he completed his PhD at the University of Twente, The Netherlands, where he worked on high current phenomena in CMOS technologies. In 2001, he joined Texas Instruments, Inc., Dallas, Texas, where he focused on ESD and latch-up development for advanced CMOS technologies, with particular emphasis on process and modeling aspects. In 2007, his responsibilities extended into ESD development of Texas Instruments’ analog technologies portfolio. He is currently managing the corporate ESD Team and he is the Director of Advanced Technology Development University Research Program. He authored several papers in the area of ESD and latch-up. He presented his work at major conferences, including EOS/ESD Symposium, IEDM, and IRPS. He has also presented many invited tutorials and papers at various conferences, including EOS/ESD Symposium, IRPS, IEDM, ESREF, IEW, and RCJ. Dr. Boselli has been the recipient of the best paper award on behalf of Microelectronics Reliability Journal in 2000. He received the best paper award at the EOS/ESD Symposium 2002. He also received the Outstanding Symposium award at the EOS/ESD Symposium in 2002, 2006, and 2010. In 2019 he was the recipient of the Outstanding Contribution Award, the most prestigious award granted by ESD Association. Dr. Boselli served multiple times as sub-committee chair for technical program committees (TPC) of EOS/ESD Symposium, IEDM, IRPS, IEW, and ESREF. He served as moderator and panelist in many workshops in ESD and latch-up area. Dr. Boselli has served as TPC chair at the EOS/ESD Symposium 2006, vice-general chair at the EOS/ESD Symposium 2007, and general chair at the EOS/ESD Symposium 2008. He is currently a member of the board of directors of EOS/ESD Association, where he serves as Chief Strategist. Dr. Boselli is an IEEE senior member and holds over twenty patents with several pending. Dr. Boselli serves in the editorial board of the IEEE Transactions on Device and Materials Reliability (T-DMR).


    Battery Diagnostics and Virtual Sensors in Ferrari

    Electronic Testing and Validation in Lamborghini

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